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automotive power data sheet rev. 1.1, 2014-11-24 BTS6110-1SJA smart high-side power switch
data sheet 2 rev. 1.1, 2014-11-24 BTS6110-1SJA table of contents 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4.1 pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4.2 pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4.3 voltage and current definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5 general product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5.2 functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5.3 thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5.3.1 pcb set up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5.3.2 thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6power stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6.1 output on-state resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6.2 turn on/off characteristics with resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6.3 frequency generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6.4 timing output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6.5 output polarization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6.6 cap pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7 protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.1 overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.2 reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.3 overload protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7.3.1 current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7.3.2 temperature limitation in the power dmos . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 8 diagnostic functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8.1 load current measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8.2 under load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 9 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 9.1 electrical characteristics power stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 9.2 electrical characteristics cap pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 9.3 electrical characteristics fo r the protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 9.4 electrical characteristics diagnostic function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 10 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 11 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table of contents
package marking pg-dso-8-49 6110-sja data sheet 3 rev. 1.1, 2014-11-24 smart high-side power switch BTS6110-1SJA 1overview application ? side indicator 2 x r10w + 1 x r2w basic features ? one channel device ? very small external reservoir capacitor of 10 f ? electrostatic discha rge protection (esd) ? optimized electromagnetic compatibility ? green product (rohs compliant) ? aec qualified protection functions ? overtemperature protection with limited restart ? overvoltage protection without external component diagnostic functions ? auto-failure detection of a failed main lamp (n -1 diagnosis), signalized by frequency doubling description the BTS6110-1SJA is a single 80 m ? channel smart high-side power switch, embedded in a pg-dso-8-49 package, providing protective functions and diagnosis. it is designed to drive lamps 2 x r10w + 1 x r2w to realize the side indicators function for motorcycle. table 1 product summary parameter symbol value operating voltage range v s(op) 9 v ... 16 v load dump voltage v s(ld) 65 v maximum on state resistance at t j = 150 c r ds(on) 200 m ? flasher frequency ; normal operation f 4 85 15 cycles / minute 1) 1) with external capacitor cext = 10f flasher frequency; loss of a main lamp / typical value f 2 f 4 * 2.24 minimum current limitation i l(sc) 20 a
data sheet 4 rev. 1.1, 2014-11-24 BTS6110-1SJA block diagram 2 block diagram figure 1 BTS6110-1SJA block diagram 3 application information note: the following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. figure 2 application example note: this is a very simplified example of an application ci rcuit. the function must be verified in the real application. table 2 bill of material reference value purpose c vs 10 nf / min. 100v reduction of voltage spikes . it is mandatory to place this component to assure correct device behavior. c ext 10 f BTS6110-1SJA energy reservoir during on state. it is mandatory to place this component to assure correct device behavior. block diagram single .vsd out over temperature gate control v s t over voltage clamping cap input trigger over current limiter + - load current sense internal power supply capacitor loading management test clock generation driver logic esd out v s application example_onedash.vsd cap c vs c ext + v bat test
BTS6110-1SJA pin configuration data sheet 5 rev. 1.1, 2014-11-24 4 pin configuration 4.1 pin assignment figure 3 pin configuration 4.2 pin definitions and functions 4.3 voltage and current definition figure 4 shows all terms used in this document, with associated convention for positive values. figure 4 voltage and current definition pin symbol function 1cap capacitor; must be connected to out via a reservoir capacitor 2 test test mode pin; must be connected to out 3, 4 out output; protected high side power output channel 1) 1) all output pins must be connected toget her on the pcb. pcb traces have to be des igned to withstand the maximum current which can flow. 5, 6, 7, 8 v s voltage supply; battery voltage pinout single so 8. vsd vs vs vs cap test out vs 1 3 2 8 7 6 45 out v s cap out v s v cap i s v ds v out i out voltage and current convention single .vsd +bat gnd i cap test v test i test
data sheet 6 rev. 1.1, 2014-11-24 BTS6110-1SJA general product characteristics 5 general product characteristics 5.1 absolute maximum ratings notes 1. stresses above the ones listed here may cause perma nent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. integrated protection func tions are designed to prevent ic destructi on under fault conditions described in the data sheet. fault conditions are considered as ?outside? normal operating range. pr otection functi ons are not designed for continuous repetitive operation. table 3 absolute maximum ratings 1) t j = -40 c to +150 c; (unless otherwise specified) 1) not subject to production test. specified by design. parameter symbol values unit note / test condition number min. typ. max. supply voltages supply voltage v s -0.3 ? 18 v ? p_5.1.1 reverse polarity voltage - v s(rev) 0 ? 16 v t < 120 s t a = 25 c r l 6 ? p_5.1.2 supply voltage for load dump protection v s(ld) ? ? 65 v 2) r i = 2 ? r l = 6 ? 2) v s(ld) is setup without the dut connect ed to the generator per iso 7637-1. p_5.1.3 cap pin voltage at cap pin v cap -0.3 ? 8.0 v ? p_5.1.4 current through cap pin i cap -2 ? 15 ma ? p_5.1.5 test pin voltage at test pin v test -0.3 ? 1 v ? p_5.1.6 current through test pin i test -2 ? 2 ma ? p_5.1.7 power stage load current | i l |? ? i l(lim) a ? p_5.1.8 power dissipation (50% duty cycle) p tot ? ? 1.4 w t a = 85 c t j < 150 c p_5.1.9 voltage at power transistor v ds ? ? 65 v ? p_5.1.10 temperatures junction temperature t j -40 ? 150 c ? p_5.1.11 storage temperature t stg -55 ? 150 c ? p_5.1.12 esd susceptibility esd susceptibility (all pins) v esd -2 ? 2 kv 3) hbm 3) esd susceptibility hbm according to eia/jesd 22-a 114b p_5.1.13 esd susceptibility (out versus vs) v esd -4 ? 4 kv 3) hbm p_5.1.14
BTS6110-1SJA general product characteristics data sheet 7 rev. 1.1, 2014-11-24 5.2 functional range note: within the functional range the ic operates as described in the circuit de scription. the electrical characteristics are specifi ed within the conditions given in the re lated electrical ch aracteristics table. 5.3 thermal resistance 5.3.1 pcb set up e = 1.27; a = 5.69; l = 1.31; b = 0.65 figure 5 pcb footprint for pg-dso-8-49 table 4 functional range t j = -40 c to +150 c; (unless otherwise specified) parameter symbol values unit note / test condition number min. typ. max. nominal operating voltage v nom 9 13.5 16 v v out = 0 v p_5.2.1 extended operating voltage v s(op) 8 ? 24 v 1) 8 to 18 v : r l = 6 ? , 18 to 24 v: r l = 12 ? v ds < 0.7 v 1) not subject to production test. specified by design. p_5.2.2 table 5 thermal resistance parameter symbol values unit note / test condition number min. typ. max. junction to case (bottom) r thjs ? 40 ? k/w 1) 1) not subject to production test. specified by design. p_5.3.1 junction to ambient r thja ? 58 ? k/w 1) 2) 2) specified r thja value is according to jedec jesd51-2,-5,-7 at natur al convection on fr4 2s2p board with thermal vias; the product (chip + package) was simula ted on a 76.4 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70m cu, 2 x 35 m cu). p_5.3.2 hlg05506 e a b l
data sheet 8 rev. 1.1, 2014-11-24 BTS6110-1SJA general product characteristics 5.3.2 thermal resistance figure 6 typical thermal resistance for fr2 pcb figure 7 typical thermal resistance for fr4 pcb 0 10 20 30 40 50 60 70 80 90 100 1.00e \ 04 1.00e \ 03 1.00e \ 02 1.00e \ 01 1.00e+00 1.00e+01 1.00e+02 1.00e+03 zth \ ja ? [k/w] time ? [s] 1s0p \ footprint 1s0p \ 100mm2 1s0p \ 300mm2 1s0p \ 600mm2 0 10 20 30 40 50 60 70 80 90 100 1.00e \ 04 1.00e \ 03 1.00e \ 02 1.00e \ 01 1.00e+00 1.00e+01 1.00e+02 1.00e+03 zth \ ja ? [k/w] time ? [s] 1s0p \ footprint 1s0p \ 100mm2 1s0p \ 300mm2 1s0p \ 600mm2
BTS6110-1SJA power stage data sheet 9 rev. 1.1, 2014-11-24 6 power stage the power stage is built using an n-channel ve rtical power mosfet (dmos) with charge pump. 6.1 output on-state resistance the on-state resistance r ds(on) depends on the junction temperature t j . figure 8 shows the dependencies in terms of temperature for the typical on-state resistanc e. the behavior in reverse polarity is described in chapter 7.2 . figure 8 typical on-state resistance 6.2 turn on/off characteris tics with resistive load a low voltage event at the out pin causes the power dmos to switch on with a dedicated slope, optimized in terms of electro magnetic emission. chapter 7.2 shows the typical timing when switching a resistive load. figure 9 switching a r esistive load timing -40 -20 0 20 40 60 80 100 120 140 160 40 60 80 100 120 140 160 180 temp [c] r ds(on) [m ] typical r ds(on) with v chi typical r ds(on) with v clo bts6110-1eja v out t rise t in it t fall 90% v s 10% v s t switching times .vsd 30% v s 70% v s dv/ dt on dv /dt off
data sheet 10 rev. 1.1, 2014-11-24 BTS6110-1SJA power stage 6.3 frequency generator the BTS6110-1SJA is designed to manage side indicators functionality. as soon as a low voltage level is applied for more than t init , at out pin, the clock generator is activated and the channel is switched on. at t1, the device starts diagnosis. refer to figure 10 . in case of underload detection, the device switches o ff and operates the failure frequency based on t 2fail . otherwise, the device stays on and runs on frequency based on t 4 . the duty cycle is fixed to d. figure 10 frequency generation timing 6.4 timing output the BTS6110-1SJA is dedicated to side indicators function on vehicle. the frequency f2 (resp t 2fail period) is tuned to be the failure indication frequency. at t1 time , the BTS6110-1SJA measures the load current. refer to figure 11 . depending on the measurement results, three possible actions will be done (see chapter 8 for the details diagnosis definition). if an underload is detected, it provok es immediate switch off to run at f2 frequency, indicating the failure. a normal diagnosis keep the power output on for t1 to run at f4 fr equency. a short circui t will latch the device. timing_definition.vsd out t out t t init t 2fail t 4 normal operation main lamp broken diagnostic t 2
BTS6110-1SJA power stage data sheet 11 rev. 1.1, 2014-11-24 figure 11 frequency generation timing 6.5 output polarization the BTS6110-1SJA includes from v s to out a pull up resistor r l(off) . this pull-up resistor compensates the i dirt leakage current due to the humidity and dust at the handle bar selector. it forces supp ly voltage vs at the output until a load is connected. the BTS6110-1SJA starts as soon as v ds is detected between v s and out by charging the external reservoir capacitor c ext . refer to figure 12 . v out i out short circuit underload diag diag diag diag nominal load t 2fail t 1 t init t init t 4 diag t 2 freq ue ncy g en erato r diag .vsd v out i out underload diag diag nominal load t init t 4 diag t 2 diag t 2fail
data sheet 12 rev. 1.1, 2014-11-24 BTS6110-1SJA power stage figure 12 output polarization circuitry in case of leakage at the output, due to rain for example, the BTS6110-1SJA might start pa rasitically. to limit the effect, a load current measurement is implemented to estimate the impedance connected at the output. an impedance lower than r rain will activate the switch while an impedanc e above (see maximu m value p_9.1.11) will keep the device in sensing mode. refer to figure 13 . figure 13 output timing during leakage application_pioggia.vsd central logic & band gap vcp charge /discharge clock vs measurement cap vs out rain effect i dirt c ext v ds v cap i cap r rain cap_load_pioggia.vsd 12v v cap t v out t 0v v chi v clo i cap t i out t selector off + rain selector on gate t t init i init i cload i cunload t 1 t2 t scan t start i start
BTS6110-1SJA power stage data sheet 13 rev. 1.1, 2014-11-24 6.6 cap pin the BTS6110-1SJA stores the needed energy to keep the dmos on during t 2 phase, in the capacitor c ext . this capacitor is loaded initially with i int while out is grounded. i int is relatively important to reduce t init , initialization time. during the next successive activations, th e charging / discharging currents are controlled to i cload and i cunload whom are significantly lower to improve emc and capacitor aging. the loading is stopped when the voltage at the capacitor v chi is reached, and restarted by v clo . this oscillation provides the reference clock to the flasher functionality. in the case v s - v out is below v s(op) , the device doesn?t start. refer from equation (1) to equation (4) and figure 14 and figure 15 . (1) (2) (3) (4) figure 14 capacitor charge and discharge timing t init c ext v s 1v ? i init -------------------- v s 1v ? v s 75v , ? ------------------------- ?? ?? ln = t 2fail t 4 d f = d t 2 t 4 ----- - 1 1 i cunload i cload -------------------------- - + ------------------------------------ == t 4 c ext r cap = cap _load . vsd v out i cap v cap t 4 i init i cunload v chi v clo i cload t 2 t init t t t
data sheet 14 rev. 1.1, 2014-11-24 BTS6110-1SJA protection functions figure 15 normal period t4 dependency in regards to capacitor value (typical behavior) 7 protection functions the BTS6110-1SJA provides integrated protection func tions. these functions are designed to prevent the destruction of the ic from fault conditions described in th e data sheet. fault conditions are considered as ?outside? normal operating range. protection f unctions are designed for neither co ntinuous nor repetitive operation. 7.1 overvoltage protection the BTS6110-1SJA is protected against overvoltage. in case of a voltage v s > v s(az) , if the handle bar selector switch is on, the z ds(az) will activate the power dmos and some current will flow, limited by the load. 7.2 reverse polarity protection in case of reverse polarity, the intrinsic body diodes of the power dmos causes power dissipation. the current in this intrinsic body diode is limited by the load itself. figure 16 shows the application schematic. 400 500 600 700 800 900 1000 7 8 9 10111213 t4 ? [ms] c ? [uf] minimum ? period ? t4 ? at ? 25c nominal ? period ? t4 maximum ? period ? t4 ? at ? 25c maximum ? period ? t4 ? in ?\ 20?85c maximum ? period ? t4 ? in ?\ 40?150c
BTS6110-1SJA protection functions data sheet 15 rev. 1.1, 2014-11-24 figure 16 reverse polarity protection 7.3 overload protection in case of overload, such as high inrush of cold lamp f ilament, or short circuit to ground, the BTS6110-1SJA offers protection mechanisms. 7.3.1 current limitation at first step, the instantaneous power in the switch is maintained to a safe value by limiting the current to i l(sc) . during this time, the dmos temperature is increasing. 7.3.2 temperature limita tion in the power dmos the channel incorporates an absolute ( t j(sc) ) and a dynamic ( t j(sw) ) temperature sensor. activation of either sensor will cause the overheated channel to switch off to prevent destruction . any protective switch off latches the output until the temperature has reac hed an acceptable value. to ensure the lamps to be turned on, the dmos restarts after cool down until t 1 . figure 17 sketches the situation. the re start takes place for maximum t 1 of the flasher in fault conditio n, around 130ms. if after this time, the device is still in restart conditions, the switch is latched until the out voltage goes to high again. out v bat(rev) i out(rev) v s t cap internal power supply logic reverse polarity .vsd + c ext v ds(rev) z ds(az) z ds(az)
data sheet 16 rev. 1.1, 2014-11-24 BTS6110-1SJA diagnostic functions figure 17 overload protection 8 diagnostic functions for diagnosis purpose, the BTS6110-1SJA measures the load current. 8.1 load current measurement the BTS6110-1SJA integrates a sense signal called i is . as long as no ?hard? failure mode occurs (current limitation / overtemperature / excessiv e dynamic temperature increase) a proportional signal to the load current (ratio k ilis = i l / i is ) is measured. to reduce current consumption, t he diagnosis is only rea lized periodically. refer to the figure 11 . the complete sense circuit and diagnostic mechanism is described on figure 18 . in the case v is < v ref , the device raises an internal fault signal, to double the flashing frequency. just before the switch on event, the device measures the supp ly voltage vs, via a voltage divider. figure 18 diagnostic block diagram v out t i out t i l( s c) t dmos t t a t j(sc) intellilatch.vsd i l( no m) t 1 t j(sw) t j(sw) t j(sc) load current limitation phase latch latch reset: selector off -> on normal operation sense schematic single.vsd 0 if v is > vref 1 if v is < vref r is + - vs out + -
BTS6110-1SJA diagnostic functions data sheet 17 rev. 1.1, 2014-11-24 8.2 under load current figure 19 shows the load current i df_l considered as a function of the load current in the power dmos. the blue curve represents the typical current threshold, assuming ideal device. the red curves show the accuracy the device provide accross full temperature range, at a defined current 1) . figure 19 current sense for nominal load 1) only idf_l9 and idf_l16 are tested in production. t he red curves between these poi nts are specified by design. underload_new.vsd i df_l v s i df_l9 i df_l16 916
data sheet 18 rev. 1.1, 2014-11-24 BTS6110-1SJA electrical characteristics 9 electrical characteristics 9.1 electrical charact eristics power stage table 6 electrical characteristics: power stage v s = 9 v to 16 v, t j = -40 c to +150 c (unless otherwise specified). typical values are given at v s = 13.5 v, t j = 25 c parameter symbol values unit note / test condition number min. typ. max. on-state resistance per channel r ds(on)_150 ? ? 200 m ? r l = 6 ? v cap = v chi t j = 150 c see figure 8 p_9.1.1 on-state resistance per channel r ds(on)_25 ? 80 ? m ? 1) t j = 25 c 1) not subject to production test, specified by design p_9.1.2 drain to source clamping voltage v ds(az) = [ v s - v out] v ds(az) 65 70 75 v i ds = 2 ma p_9.1.3 output leakage resistor r rain 0.04 0.4 1 k ? 1) p_9.1.11 slew rate 30% to 70% v s d v /d t on 0.1 0.25 0.5 v/s r l = 6 ? v s = 13.5 v see figure 9 p_9.1.5 slew rate 70% to 30% v s -d v /d t off 0.1 0.25 0.5 v/s p_9.1.6 turn-on time to v out = 10 to 90% v s t rise ? 70 1) ? s p_9.1.7 turn-off time to v out = 90 to 10% v s t fall ? 70 1) ? s p_9.1.8 switch on energy e on ? 450 ? j 1) r l = 6 ? v out = 90% v s v s = 16 v p_9.1.9 switch off energy e off ? 470 ? j 1) r l = 6 ? v out = 10% v s v s = 16 v p_9.1.10
BTS6110-1SJA electrical characteristics data sheet 19 rev. 1.1, 2014-11-24 9.2 electrical char acteristics cap pin table 7 electrical characteristics: cap pin v s = 9 v to 16 v, t j = -40 c to +150 c (unless otherwise specified). typical values are given at v s = 13.5 v, t j = 25 c parameter symbol values unit note / test condition number min. typ. max. load current initialization load current i init 3 4.5 10 ma see figure 14 v s = 9 v p_9.2.1 charging current i cload 76.4 a 1) see figure 14 v cap = 5.37 v 1) not subject to production test, specified by design p_9.2.2 discharging current i cunload -74.4 a 1) see figure 14 v cap = 5.37 v p_9.2.3 load current matching i cratio = | i cunload | / i cload 0.97 ? 1) see figure 14 p_9.2.4 voltage threshold cap voltage high threshold v chi 6.4 v 1) see figure 14 p_9.2.5 cap voltage low threshold v clo 4v 1) see figure 14 p_9.2.6 cap voltage diagnostic threshold v cdiag 5.37 v 1) see figure 14 p_9.2.7 cap voltage threshold matching v osc = v chi - v clo 2.4 v 1) see figure 14 p_9.2.8 flasher duty cycle device dependency r load = v osc / i cload ? 32 ? k ? 1) see figure 14 p_9.2.10 flasher duty cycle device dependency r unload = v osc / i cunload ? 31.6 ? k ? 1) see figure 14 p_9.2.11 flasher duty cycle device dependency r cap = r unload + r load 58 63.6 75 k ? p_9.2.17 flasher duty cycle device dependency r cap_usage 58 63.6 70.3 k ? 1) 2) t j = -20c to 85c p_9.2.19 flasher duty cycle device dependency r cap_amb 58 63.6 69.2 k ? 1) 2) t j = +25c p_9.2.20 time generator duty cycle d 45 50 55 % ? p_9.2.14 double frequency factor df = t 2fail / t 4 0.40 0.45 0.50 ? ? p_9.2.18 initialisation time t init ? 30 ? ms ? 1)2) v s = 9v 2) with a cext of 10 f p_9.2.13 impedance sensing time t scan ? 25 ? ms ? 1)2) p_9.2.16
data sheet 20 rev. 1.1, 2014-11-24 BTS6110-1SJA electrical characteristics 9.3 electrical characteristi cs for the protection functions table 8 electrical characteristics: protection v s = 9 v to 16 v, t j = -40 c to +150 c (unless otherwise specified). typical values are given at v s = 13.5 v, t j = 25 c parameter symbol values unit note / test condition number min. typ. max. reverse polarity drain source diode voltage during reverse polarity v ds(rev) 200 600 700 mv r l = 6 ? t j = 150 c see figure 16 p_9.3.1 overload condition load current limitation i l(sc) 20 27 36 a 1) v ds = 5 v 1) test at tj = -40c only p_9.3.2 dynamic temperature increase while switching ? t j(sw) ?80?k 2) see figure 17 2) not subject to production test, specified by design. p_9.3.5 thermal shutdown temperature t j(sc) 150 170 2) 200 2) c see figure 17 p_9.3.3 thermal shutdown hysteresis ? t j(sc) ? 30 ? k 2) see figure 17 p_9.3.4
BTS6110-1SJA electrical characteristics data sheet 21 rev. 1.1, 2014-11-24 9.4 electrical character istics diagnostic function table 9 electrical characteristics: diagnostics v s = 9 v to 16 v, t j = -40 c to +150 c (unless otherwise specified). typical values are given at v s = 13.5 v, t j = 25 c parameter symbol values unit note / test condition number min. typ. max. load current underload threshold load current threshold low battery operation idf_l9 0.782 0.924 1.067 a v s at 9 v step see figure 19 p_9.4.1 load current threshold high battery operation idf_l16 1.074 1.269 1.464 a v s at 16 v step see figure 19 p_9.4.2
data sheet 22 rev. 1.1, 2014-11-24 BTS6110-1SJA package outlines 10 package outlines figure 20 pg-dso-8-49 (plastic dual small outlin e package) (rohs-compliant) green product (rohs compliant) to meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. green products are rohs-compliant. for the soldering of this device the appropriate temperatur e profile as described in j-std-020 is to be used . table 10 package classification value purpose msl3 jedec humidity category acc. j-std-020-d 260c jedec classification te mperature acc. j-std-020-d 0.35 x 45 1) -0.2 4 c +0.06 0.19 0.64 0.2 6 0.25 0.2 8x m c 1.27 +0.1 0.41 0.2 m a -0.06 8x seating plane b 2) index marking 4 1 85 5 -0.2 1) a 1) does not include plastic or metal protrusion of 0.15 max. per side 2) lead width can be 0.61 max. in dambar area 1.75 max. (1.45) 0.07 0.175 b 0.1 pg-dso-8-16, -24, -25, -28, -31, -33, -36, -44, -49- po v06 8 max.
BTS6110-1SJA revision history data sheet 23 rev. 1.1, 2014-11-24 11 revision history version date changes 1.1 2014-11-24 chapter 3 - changed position of the notes chapter 5.3 - removed the hint for ex posed pad packages in footnote of table 5 chapter 6.3 - minor text chang e and update of figure 10 chatper 6.4 - minor text ch ange and update of figure 11 chatper 6.5 - typo in text and updat e of figure 12 and 13 (typo and headline) chapter 7.3.2 - typo in text corrected chapter 8.2 - update of figure 19 chapter 9.2 - p_9.2.2 and p_9.2. 3 changed test condition from v cap - v out = 5.37 v to v cap = 5.37 v chapter 10 - updated package drawing figure 20 1.0 2014-02-27 creation of the document
edition 2014-11-24 published by infineon technologies ag 81726 munich, germany ? 2014 infineon technologies ag all rights reserved. legal disclaimer the information given in this docu ment shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, infine on technologies hereby disclaims any and all warranties and liabilities of any kind, including witho ut limitation, warranties of non-infrin gement of intellectua l property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the nearest infineon technologies office. infineon technologies compon ents may be used in life-su pport devices or systems only with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safe ty or effectiveness of that de vice or system. life support devices or systems are intended to be implanted in the hu man body or to support an d/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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